Motorola to speed up chip design time, lay off workers

Motorola's customer specified integrated circuits (CSIC) unit has announced that it has shortened the time it takes to design semiconductors from seven weeks to seven days.

Motorola's customer specified integrated circuits (CSIC) unit has announced that it has shortened the time it takes to design semiconductors from seven weeks to seven days, a move that could result in lower prices on cellular phones and other microcontroller-based products, according to Motorola.

Motorola has been working for two years with San Jose, California- based Cadence Design Systems, a company which makes software to help chip designers streamline production, in order to find ways to cut down on design time and thus reduce development costs. The product of the partnership is Motorola's new seven-Day CSIC design methodology, which will allow 68HC08 microcontrollers, used in products from cellular phones to garage door controllers, to be designed and prepared for production in one week. Aimed at helping companies reduce product development cycles, the new technology will be made available to all of Motorola's design centres worldwide within the next year, according to Charles Studor, 7-Day CSIC project manager.

In a separate announcement, Motorola has announced it will lay off 145 workers hired since March 1995 in two semiconductor plants in Austin, Texas, and Phoenix, Arizona. The company cites weak demand for semiconductors as the reason for cutting back its work force, but the advent of the new seven-day technology is not related to the layoffs, says Chuck Granieri, a spokesman for Motorola. "This is an adjustment needed to bring things back into balance," says Granieri.

Last week, Motorola announced a 32% drop in earnings for the second quarter.

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