Enhanced MMX to appear in Intel's Katmai

Intel will more than double the number of MMX instructions next year, ushering in a new family of Pentium II processors with higher performance in 3-D applications. The 'Katmai New Instructions' will debut during the first half of the year in 32-bit Intel Architecture (IA-32) CPUs, also called Katmai. The enhanced instruction set will then propagate through the range of the IA-32 Pentium II CPUs as new, faster chips to replace today's MMX versions. Katmai instructions will appear in CPUs that cover the gamut of applications, said Richard Dracott, marketing director of Intel's microprocessor products group

Intel will more than double the number of MMX instructions next year, ushering in a new family of Pentium II processors with higher performance in 3-D applications.

The "Katmai New Instructions" will debut during the first half of the year in 32-bit Intel Architecture (IA-32) CPUs, also called Katmai. The enhanced instruction set will then propagate through the range of the IA-32 Pentium II CPUs as new, faster chips to replace today's MMX versions.

Katmai instructions will appear in CPUs that cover the gamut of applications, said Richard Dracott, marketing director of Intel's microprocessor products group, in Hillsboro, Oregon.

As usual, the new technology will appear first in high-performance CPUs. As Katmai-enhanced, high-performance chips appear for desktops, mobiles, and workstations, they will replace the slower Pentium II CPUs.

The Katmai instructions will also be implemented in the IA-64 Merced processor, also planned for introduction in 1999, Dracott said.

The transition to Katmai instructions should be smooth, Dracott said. Software will not become obsolete as Katmai-enhanced programs become available, he added.

This contrasts with the MMX launch, which left users with the choice of switching to Pentium-based, MMX-enhanced systems or higher-performance Pentium Pro systems, which do not offer MMX enhancements, Dracott explained.

There will be 70 Katmai New Instructions, said Taufik Ma, independent software vendor (ISV) marketing manager at Intel's microprocessor division, also in Hillsboro. These add to the 57 MMX instructions that enhance the hundreds of instructions in the Pentium II instruction set.

The most conspicuous additions are single instruction, multiple data (SIMD) instructions for floating-point operations, which will boost 3-D performance, Ma said. MMX technology has an SIMD architecture only for integer data types, he noted.

Ma said that hundreds of ISVs are already working with Intel on business and consumer titles. Among the business applications he projected are 3-D Internet-commerce and speech recognition.

"We'll be driving that category more and more," Ma said.

To boost performance will also require improvements in PC architectures, Ma said. For example, Katmai-enhanced systems are expected to implement the 4x Accelerated Graphics Port (AGP) and higher-speed memory.

The 4x AGP will require a new core-logic chip set, Ma said. He declined to name the product's part number.

Increased memory bandwidth could come from Direct Rambus DRAM, Ma said.

"That's one of the ways you could potentially do it," Ma said.

Other new memory architectures could also yield large-enough bandwidth, said Ma, who declined to specify which architectures, such as double-data-rate synchronous DRAM, would suffice.

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