Intel Focuses on Packages to Cut Costs

Intel is developing new packages to increase the performance and cut the cost of its CPUs. Beginning later this year, desktop Pentium II processors will use technology developed for mobile CPUs to allow speeds of 500MHz and above. At the same time, these slot 1 processors will use an updated single-edge contact cartridge called SECC 2 to reduce system builders' costs.

Intel is developing new packages to increase the performance and cut the cost of its CPUs.

Beginning later this year, desktop Pentium II processors will use technology developed for mobile CPUs to allow speeds of 500MHz and above. At the same time, these slot 1 processors will use an updated single-edge contact cartridge called SECC 2 to reduce system builders' costs.

The low-cost Celeron processor, meanwhile, will begin to transition away from slot 1 to a 370-pin socket, again to reduce costs. Intel will offer Celeron chips in both packages until OEMs (original equipment manufacturers) shift away from the slot 1 version.

In Pentium II processors, which will continue in their slot 1 packages, the SECC 2 cartridge will dispense with the back of the CPU casing where the heat sink was fixed. System builders will attach the heat sink directly to the chip, as in mobile Pentium II processors.

This will reduce some cost in the Pentium II CPU itself. More importantly, it will require a smaller heat sink to reduce system manufacturers' costs for parts and assembly.

Intel will wrap the CPU silicon within the SECC 2 package in an organic land grid array (OLGA) package, as a re today's mobile Pentium II chips. Current Pentium II processors use a plastic land grid array (PLGA).

The OLGA package uses Intel's version of flip-chip technology. The technology was developed in the 1960s by IBM, which calls it the Controlled Collapse Chip Connection (C4) process.

All PowerPC and ASIC products from IBM Microelectronics use C4 technology as a standard offering. Advanced Micro Devices Inc. (AMD) also uses the C4 process in its K6 processor.

C4 technology makes the most of silicon "real estate" by using bumps anywhere on the chip for I/O connections, AMD officials explained in a statement. The older wire-bonding techniques used in today's Pentium II CPUs only use the perimeter of a circuit for I/O, resulting in larger die size and higher manufacturing cost.

C4 technology's use of solder bumps instead of leads also improves the processor's electrical performance because signals travel a shorter distance from the bond pad to the package, AMD explained.

That will allow Intel to push Pentium II speeds beyond 500 MHz, an Intel representative said. The technology will be used in Pentium II processors that run at 350 MHz or higher.

Once the technology is proven, it will be implemented on all Katmai processors, the Pentium II-family processors with graphics-oriented Katmai New Instructions, which will be introduced early next year at speeds of 450MHz and above.

Intel, in Santa Clara, California, is at http://www.intel.com/.

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