Intel and Hewlett-Packard have released new information that will help independent software vendors and application developers write applications for the forthcoming 64-bit IA-64 chip architecture.
The IA-64 Application Instruction Set Architecture Guide -- available on the Intel and HP Web sites -- details the application instruction set, architecture features and programming models for IA-64 processors.
The information should help software vendors take advantage of several new features, such as speculative execution (where the chip "guesses" ahead what operation might be needed next) and explicit parallelism, that will be available on IA-64 chips.
HP and Intel have been working together on IA-64 since 1994. The first chip based on the technology, code-named Merced, is expected to become available in the second half of the year. Early Merced-based systems are expected to start shipping by year's end.
IA-64's appeal lies in its promise to let users run both Unix and Windows NT applications equally well. Unlike current-generation complex instruction set computing and RISC architectures, IA-64 is based on a completely new technology called Explicitly Parallel Instruction Computing. The technology is backward-compatible with current-generation 32-bit Intel X86 chip architectures as well as with RISC architectures.
Almost all the major systems vendors have committed to making IA-64 versions of their software available by the time the first systems based on the technology start shipping. HP, for example, is porting its HP-UX to IA-64, and Sun Microsystems Inc. is doing the same with its Solaris Unix flavor. Also, IBM is working with SCO Inc. to develop a common Unix for IA-64.